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24AA02H/24LC02BH
6.0
ACKNOWLEDGE POLLING
7.0
WRITE PROTECTION
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W = 0 ). If the device is still
busy with the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next Read or
Write command. See Figure 6-1 for a flow diagram of
this operation.
The WP pin allows the user to write-protect half of the
array (80h-FFh) when the pin is tied to V CC . If tied to
V SS , the write protection is disabled.
FIGURE 6-1:
ACKNOWLEDGE
POLLING FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0 )?
Yes
Next
Operation
? 2008 Microchip Technology Inc.
No
DS22105A-page 9
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